Comparative Performance of InfiniBand Architecture and Gigabit Ethernet Interconnects on Intel® Itanium® 2 Microarchitecture-based Clusters
The Intel® Itanium® 2 microarchitecture is based on a 64-bit processor architecture that is ideally suited to compute-intensive applications such as LS-DYNA. In fact, Hewlett Packard* has demonstrated outstanding performance of their Itanium 2-based systems on a range of technical computing applications, including LS-DYNA[1]. Given the success of the platform in achieving performance on a per-processor basis, we turned our attention to the speedups achievable with tightly coupled clusters of Itanium architecture-based servers. In this paper, we study the scalability of an Itanium 2-based server cluster consisting of 4-CPU SMP nodes, connected by gigabit Ethernet* and by a high-performance InfiniBand* Architecture interconnect. We study the relative performance of these interconnects, relating the observed application-level performance to the underlying performance characteristics of the interconnect.
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Comparative Performance of InfiniBand Architecture and Gigabit Ethernet Interconnects on Intel® Itanium® 2 Microarchitecture-based Clusters
The Intel® Itanium® 2 microarchitecture is based on a 64-bit processor architecture that is ideally suited to compute-intensive applications such as LS-DYNA. In fact, Hewlett Packard* has demonstrated outstanding performance of their Itanium 2-based systems on a range of technical computing applications, including LS-DYNA[1]. Given the success of the platform in achieving performance on a per-processor basis, we turned our attention to the speedups achievable with tightly coupled clusters of Itanium architecture-based servers. In this paper, we study the scalability of an Itanium 2-based server cluster consisting of 4-CPU SMP nodes, connected by gigabit Ethernet* and by a high-performance InfiniBand* Architecture interconnect. We study the relative performance of these interconnects, relating the observed application-level performance to the underlying performance characteristics of the interconnect.